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lcd c ontroller 1 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 specification 1. features : * operating voltage : 2.5v ? 3.5 v. * maximum cpu operating frequency : 2mhz at 2.7v * oscillators : - rc or 32.768 khz crystal oscillator for lcd display and watch timer. - built-in pll circuit to generate 4.19mhz system clock. * 40 segments and 4 commons output for lcd drive r. - 1/3 bias, 1/4 duty and 64hz frame frequency. * 20 i/o pins. - 8 i/o pins with selectable wake up interrupt. - 4 general i/o pins. - 8 i/o pin shared with s32-s39. * built in 160 bytes data ram and 20 bytes write-only ram for lcd display. * built in 96k bytes rom with 16k bytes per bank for program. * one 8-bit timer with 8 predefined input clock. * two sound generators and one voice channel with pwm outputs. * seven interrupt sources : nmi - 64 hz interrupt irq1 - fix-time timer int errupt irq2 - timer 1 interrupt irq3 - external interrupt irq4 - timer 2 interrupt irq5 - sound generator 1 interrupt irq6 - sound generator 2 interrupt * code option : - built-in 150k ohm pull-up resistors for i/o port. - rc or 32768hz crystal oscillation for lcd driver. 2. application : * talking calculator * talking clock * hand-held game
lcd c ontroller 2 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 * small instrument 3. block diagram : a0-a15 irq d0-d7 p10-p17 p20-p23 pwm1 pwm2 8-bit cpu address decoder rom 96kx8 ram 160x8 clock generator lcd driver 8-bit timer port 1 two sound generators and one voice channel with pwm output pll 32768hz c0-c3 s0-s39 vcap lcd ram 20x8 port 2
lcd c ontroller 3 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 4. pin description : (total 72 pads) pin name i/o function description com0-com3 o lcd common output pins seg0-seg39 o lcd segment output pins p10-p17 i/o 8-bit i/o pins for port 1 p20-p23 i/o 4-bit i/o pins for port 2. p2 3 can be set as output with carrier clock. p30-p37 i/o 8-bit i/o pins for port 3. these pins are shared with s32-s39. vcap i/o low pass filter capacitor for pll. xosc1 i 32.768k hz crystal oscillator input xosc2 o 32.768k hz crystal oscillator output pwm1 pwm2 o sound channel pwm output with volume control. /res i system reset pin with 100k pull-up resistor. vlcd i bias voltage input pin. vc2 i 2/3vlcd bias voltage input pin. vc1 i 1/3vlcd bias voltage input pin. c1a, c1b booster capacitor connection pins c2a, c2b booster capacitor connection pins /test i test pin. keep floating or connect to vdd vdd1 power input for pwm output vss1 signal ground for pwm output vdd power input vss signal ground
lcd c ontroller 4 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 5. address arrangement 1) lcd data latches 0000-001c for lcd output data storage. the memory addresses, which are not specified in the table, are not implemented. this area is write only. seg0-seg7 seg8-seg15 seg31-seg39 com0 0000 0001 0004 com1 0008 0009 000c com2 0010 0011 0014 com3 0018 0019 001c the lsb of low byte ? seg0. the msb of high byte ? seg39. the middle bits are in the order. 2) ram 0040-00df for zero page area. 0140-01df for stacks. this area is overlapped with 0040-00df. 3) rom 8000-bfff for program bank area. c000-ffff for program area. this area is always mapping to the last 16k bytes of internal rom and it is not affected by the bank setting. ffff, fffe - irq vector. fffd, fffc - res vector. fffb, fffa - nmi vector. 4) others 1000 to enter stand-by mode. write only. * write this address, the cpu will be hold with lcd state no change. * when in stand-by mode, the nmi and irq will wake up the cpu. 1001 to enter sleep mode. write only. bit 0 = 1 sleep mode 1
lcd c ontroller 5 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 1 = 1 sleep mode 2 in sleep mode 1, both of the main system oscillator and 32.768khz sub-system oscillator will be stopped. so, all functions are stopped and only external interrupt can wake up this chip. the lcd display will be turn off while getting into sleep mode 1. if the lcd is turned on after wake-up immediately, then some garbage may display on the lcd. it is better to turn off the lcd by software before enter sleep mode 1. after wake up, the software has to delay several ms before turn on the lcd because the crystal will take several ms to stable. in sleep mode 2, only main system oscillator will be stopped. so, the following functions will still keep working. * the lcd will be kept on. * the fix-time timer will keep going. * the nmi, port 1, and fix-time timer interrupt will wake up this chip. * cpu will keep working if clock source is 32.768k hz. 1002 watch timer control register. write only. bit 1 : = 0 set fix-time timer interrupt at 2 hz = 1 set fix-time timer interrupt at 1 hz 7- 2 : reserved. the default values for each bit is zero. 1003 irq flag register. read & write. read function : bit 0 : = 1 fix-time timer interrupt, irq1. 1 : = 1 timer 1 interrupt, irq2. 2 : = 1 port 1 interrupt, irq3. 3 : = 1 timer 2 interrupt, irq4. 4 : = 1 sound generator 1 (timer3) interrupt, irq5. 5 : = 1 sound generator 2 (timer4) interrupt, irq6. write function : bit 0 : = 0 clear fix-time timer interrupt. 1 : = 0 clear timer 1 interrupt. 2 : = 0 clear port 1 interrupt. 3 : = 0 clear timer 2 interrupt. 4 : = 0 clear sound generator 1 (timer3) interrupt.
lcd c ontroller 6 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 5 : = 0 clear sound generator 2 (timer4) interrupt. * before firmware exits the interrupt routine, the interrupt flag must be cleared. otherwise, the ic will get into interrupt again. * write 0 to clear the corresponding irq. * do not use trb to test and clear this register. following instructions are recommended. lda $ 1 003 and #1 ;if irq 1 is checking. beq next_irq eor #0ffh sta $ 1 003 ;clear the active interrupt. 1004 port 1 data. read & write.
lcd c ontroller 7 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 1005 set port 1 bit function. write only. * an '1' in this register will set the corresponding pin of port 1 as an output pin. * the default values for each bit is zero. a pull-up resistor can be added to the pin by code option. but the pull-up resistor will be disabled if this pin is set as output. 1006 port 2 data. read & write. bit 3- 0 : port 2 data. 7- 4 : reserved. 1007 set port 2 bit function. write only. * an '1' in this register will set the corresponding pin of port 2 as an output pin. * the default values for each bit is zero. a pull-up resistor can be added to the pin by code option. but the pull-up resistor will be disabled if the output state is low. 1008 volume control for sound channel 1. write only. bit 6- 0 : volume for sound channel 1. see the explanation in $1009. 1009 volume control for sound channel 2. write only. bit 6- 0 : volume for sound channel 2. $7f is the maximum volume. condition maximum volume for sound channel only 1 sound channel on 0-7fh two sound channels on 0-3fh voice and one or two sound channels on 0-1fh 100a voice output data. write only. bit 7- 0 : output data for pwm. $ff is the maximum value. condition maximum volume for voice channel only voice channel on 0-ffh voice and one or two sound channels on 0-7fh * the voice data should be divided by 2 if any sound channel is turn on at the same time. * it is not necessary to do the ramp-up or ramp-down function for the voice output. 100b global volume control for pwm output. write only. bit 7- 5 : global volume for pwm output. $ff is the maximum volume. * this volume control will set the overall maximum volume for the pwm output.
lcd c ontroller 8 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 * the pwm period is 1/fxosc. 100c set port 1 wake-up and interrupt function. write only. * an '1' in this register will set the wake-up and interrupt function of the corresponding pin of port 1 to be enable. that is, the chip will be waked up and an interrupt will be generated if a low level is detected in the pin. * if port 1 are used as key inputs, there are several interrupts will be generated during key pressing or release. this is caused by key bounce. it is suggested to enable the wake-up function by set this register and disable the port1 interrupt by reset the bit 0 of $100f. * the default values for each bit is zero. 100d timer 1 data. read & write. * before writing $100d, the program should select timer clock ($100e) first. * after timer 1 been enabled, the timer will start to count down. when timer counts to zero, the timer will count from the initial value and irq2 will happen. * valid values are from 1 to 255. zero is prohibited. * if cpu read this register, the value will be 1 to 255. please note that the cpu will never read a zero from timer. * the time elapse = [($100d)+1]/timer clock 100e timer 1 clock select and contrast setting. write only. bit 2- 0 : = 000 cpu clock/2 = 001 cpu clock/4 = 010 cpu clock/8 = 011 cpu clock/16 = 100 cpu clock/32 = 101 cpu clock/64 = 110 cpu clock/128 = 111 cpu clock/256 3 : =0 disable voltage regulator and voltage double circuit. = 1 enable voltage regulator and voltage double circuit. 7- 4 : lcd contrast control. the minimum contrast value is zero and the maximum contrast value is 0fh. the default state is maximum contrast. the default values of bit 3-0 are unknown.
lcd c ontroller 9 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 user should disable the voltage regulator and voltage double circuit after turn off lcd display to reduce the current consumption. the voltage regulator and voltage double circuit should be enabled several ms before turn on the lcd display. 100f control register. write only. bit 0: = 0 disable port 1 interrupt but wake-up function is still work. = 1 enable port 1 interrupt and wake-up function. 1 : = 0 disable timer 1 interrupt. = 1 enable timer 1 interrupt. 2 : = 0 disable nmi. = 1 enable nmi. 3 : = 0 disable timer 1. = 1 enable timer 1. 4 : = 0 lcd off. = 1 lcd on. 5 : = 0 disable timer 2 and interrupt. = 1 enable ti mer 2 and interrupt 6 : = 0 disable fix-time timer interrupt. = 1 enable fix-time timer interrupt. 7 : = 0 set s32-s39 as lcd segment outputs. = 1 set s32-s39 as output port 3. * the default values for each bit is zero. 1010 sound generator clock select. write only. bit 2- 0 : sound generator 1 clock select. = 000 cpu clock/2 = 001 cpu clock/4 = 010 cpu clock/8 = 011 cpu clock/16 = 100 cpu clock/32 = 101 cpu clock/64 = 110 cpu clock/128 = 111 cpu clock/256 6- 4 : sound generator 2 clock select. = 000 cpu clock/2
lcd c ontroller 10 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 = 001 cpu clock/4 = 010 cpu clock/8 = 011 cpu clock/16 = 100 cpu clock/32 = 101 cpu clock/64 = 110 cpu clock/128 = 111 cpu clock/256 7,3 : reserved the default value is unknown. 1011 sound generator 1 data. write only. * before writing $1011, the program should select timer clock ($1010) first. * after sound generator is enabled, it will start to count down. when it counts to zero, the it will count from the initial value again. * valid values are from 1 to 255. zero is prohibited. * in timer mode, the time elapse = [($1011)+1]/timer clock * in sound generator mode, the output freq. = timer clock/[($1011)+]/2 1012 sound generator 2 data. write only. * before writing $1012, the program should select timer clock ($1010) first. * after sound generator is enabled, it will start to count down. when it counts to zero, it will count from the initial value again. * valid values are from 1 to 255. zero is prohibited. * in timer mode, the time elapse = [($1012)+1]/timer clock * in sound generator mode, the output freq. = timer clock/[($1012)+1]/2 1013 sound channel control register. write only. bit 1- 0 : = x0 disable sound generator 1 and timer 3 interrupt. = 01 set sound generator 1 as timer 3 and generates timer 3 interrupt. = 11 set soun d generator 1 output to sound channel. 3- 2 : = 00 disable sound generator 2 and timer 4 interrupt. = 01 set sound generator 2 as timer 4 and generates timer 4 interrupt. = 10 set sound generator 2 as carrier generator. the carrier clock will be inserted into p2 3 output pin. = 11 set sound generator 2 output to sound channel.
lcd c ontroller 11 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 4 : = 0 disable voice channel output. = 1 enable voice channel output. 7 : = 0 add the carrier clock to output during bit 3 of port 2 is low. = 1 add the carrier clock to output during bit 3 of port 2 is high. the default values for each bit is zero. if sound generator is set as timer, then an irq will be generated when the timer is time- out. equivalent circuit diagram for p2 3 1015 set cpu operating frequency. write only. bit 2- 0 : = 000 cpu clock = fxosc = 001 cpu clock = fsys / 8 = 010 cpu clock = fsys / 4 (default) = 011 cpu clock = fsys / 3 = 100 cpu clock = fsys / 2.5 = 101 cpu clock = fsys /2 = 110 cpu clock = fsys / 1.5 = 111 cpu clock = fsys 7- 3 : reserved. fxosc is the oscillation frequency on xosc1 and xosc2 and the fsys is fxosc x 128 (about 4.19mhz). the cpu will be halt for four system cycles after cpu clock change or wake-up from sleep /standby mode. 1016 set bank number of internal memory; write only bit 2- 0 : internal rom bank value. this value will define which area of internal rom will map to cpu address 8000h-0bfffh. the valid values are 2 to 7. = 000 reversed. = 001 reversed.
lcd c ontroller 12 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 = 010 internal rom address 08000h-0bfffh. = 011 internal rom address 0c000h-0ffffh. = 100 internal rom address 10000h-13fffh. = 101 internal rom address 14000h-17fffh. = 110 internal rom address 18000h-1bfffh. = 111 internal rom address 1c000h-1ffffh. 7- 3 : reserved. 1017 timer 2 data. write only. bit 5- 0 : timer 2 value. the valid values are 1 to 3fh. 7- 6 : reserved. * after timer 2 been enabled, the timer will start to count down. when timer counts to zero, the timer will count from the initial value and irq4 will happen. * the interrupt frequency = 32768*8/[($1017)+1] 1018 port 3 data. read and write. 1019 set port 3 bit function. write only. * an '1' in this register will set the corresponding pin of port 3 as an output pin. * the default values for each bit is zero. a pull-up resistor can be added to the pin by code option. but the pull-up resistor will be disabled if the output state is low. 6. function description 6.1 the reset state of control registers: address value after reset $1002 xxxxxx10 $1003 xxx00000 $1004 xxh $1005 00h
lcd c ontroller 13 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 address value after reset $1006 xxh $1007 00h $1008 xxh $1009 xxh $100a xxh $100b xxh $100c 00h $100d xxh $100e 11111xxx $100f 00h $1010 xxh $1011 xxh $1012 xxh $1013 00h $1015 xxxxx010 $1016 xxh $1017 xxh $1018 xxh $1019 00h 6.2 the reset status of cpu if the /res is keep low more than two system clocks, then the cpu will be reset. after reset, the interrupt mask flag is set, the decimal mode is cleared and the program counter will be loaded with the reset vector from address $fffc and $fffd. so, after initial procedure the firmware should do a ? cli ? instruction . otherwise, the cpu will not acknowledge any interrupt. 6.3 interrupt sources * there are seven interrupt sources : nmi - 64 hz interrupt. irq1 - fix-time timer interrupt. irq2 - timer 1 interrupt.
lcd c ontroller 14 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 irq3 - port 1 interrupt. irq4 - timer 2 interrupt. irq5 - sound generator 1 interrupt. irq6 - sound generator 2 interrupt. * all interrupts will wake up cpu from standby mode. * nmi, irq1 and irq3 will wa ke up cpu from sleep mode 2. * only irq3 will wake up cpu from sleep mode 1. * when port 1 is in input mode and pin interrupt enable, a low signal from that pin will generate irq3. * when the cpu acknowledge the interrupt, following things will be done: a) the interrupt mask flag will be set by cpu b) the return address and status register will be pushed to stack. * when the cpu return from interrupt routine by rti instruction following things will be done: a) the return address and status register will be pulled from stack. b) the interrupt mask flag will be cleared. * i t is not necessary to add sei and cli instructions in interrupt routine . if a cli instruction is added in the interrupt routine, then another interrupt may be inserted during current interrupt routine and may cause stack overflow. 7. absolute maximum ratings operating temperature ........................................................................ 0 to 70 j storage temperature ...................................................................... -65 to 150 j supply voltage ............................................................................................... 7 v input voltage ........................................................................... -0.6 to vdd+0.6 v
lcd c ontroller 15 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 8. electrical characteristic : parameter symbol condition min typ. max unit supply voltage vdd 2.5 3.0 3.5 v lcd driver voltage vlcd 3/2vdd v main system frequency ? sys 4.19 mhz cpu operating frequency ? sys vdd=2.7v .03 1 4.19 mhz crystal frequency ? cry 32768 hz operating current idd vdd=3v, ? sys=1mhz 1 ma sleep mode 1 current islp1 vdd=3v, lcd off 0.5 1 m a sleep mode2 current islp2 vdd=3v, lcd on vdd=3v, lcd off 10 3 m a m a input high voltage vih vdd=3.0v 1.5 v input low voltage vil vdd=3.0v -0.6 0.8 v input high leakage current iih vih=vdd -1 m a input low leakage current iil vil=0 1 m a output high voltage (for segx and comx) voh1 ioh=-30 m a vlcd -0.2 vlcd v output low voltage (for segx and comx) vol1 iol=40 m a 0 0.2 v output high voltage (for other pins) voh2 ioh=-2ma vdd- 0.4 vdd v output low voltage (for other pins) vol2 iol=2ma 0 0.4 v
lcd c ontroller 16 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 9. lcd waveform : 1/64 sec vlcd 2/3 vlcd com0 1/3 vlcd vss vlcd 2/3 vlcd com1 1/3 vlcd vss vlcd 2/3 vlcd com2 1/3 vlcd vss vlcd 2/3 vlcd com3 1/3 vlcd vss vlcd 2/3 vlcd segx 1/3 vlcd vss there are two lcd matrix dots active at (segx ,com1) and (segx,com3)
lcd c ontroller 17 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 10. pad location : main pattern size : 2050 g m ?? 2960 g m no name x y 1 vdd 60.00 217.50 39 seg6 1990.00 2729.00 2 port10 139.00 60.00 40 seg7 1990.00 2849.00 3 port11 259.00 60.00 41 seg8 1865.00 2900.00 4 port12 379.00 60.00 42 seg9 1745.00 2900.00 5 port13 499.00 60.00 43 seg10 1625.00 2900.00 6 port14 619.00 60.00 44 seg11 1505.00 2900.00
lcd c ontroller 18 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 no name x y 7 port15 739.00 60.00 45 seg12 1385.00 2900.00 8 port16 859.00 60.00 46 seg13 1265.00 2900.00 9 port17 979.00 60.00 47 seg14 1145.00 2900.00 10 port20 1099.00 60.00 48 seg15 1025.00 2900.00 11 port21 1219.00 60.00 49 seg16 905.00 2900.00 12 port22 1339.00 60.00 50 seg17 785.00 2900.00 13 port23 1459.00 60.00 51 seg18 665.00 2900.00 14 resl 1579.00 60.00 52 seg19 545.00 2900.00 15 ztest 1699.00 60.00 53 seg20 425.00 2900.00 16 vdd 1819.00 60.00 54 seg21 305.00 2900.00 17 vdd 1939.00 60.00 55 seg22 185.00 2900.00 18 vcap 1990.00 209.00 56 seg23 60.00 2849.00 19 xosc1 1990.00 329.00 57 seg24 60.00 2729.00 20 xosc2 1990.00 449.00 58 seg25 60.00 2609.00 21 gnd 1990.00 569.00 59 seg26 60.00 2489.00 22 c1b 1990.00 689.00 60 seg27 60.00 2369.00 23 c1a 1990.00 809.00 61 seg28 60.00 2249.00 24 c2b 1990.00 929.00 62 seg29 60.00 2129.00 25 c2a 1990.00 1049.00 63 seg30 60.00 2009.00 26 vc1 1990.00 1169.00 64 seg31 60.00 1889.00 27 vc2 1990.00 1289.00 65 seg32 60.00 1769.00 28 vlcd 1990.00 1409.00 66 seg33 60.00 1649.00 29 com0 1990.00 1529.00 67 seg34 60.00 1529.00 30 com1 1990.00 1649.00 68 seg35 60.00 1409.00 31 com2 1990.00 1769.00 69 seg36 60.00 1289.00 32 com3 1990.00 1889.00 70 seg37 60.00 1169.00 33 seg0 1990.00 2009.00 71 seg38 60.00 1049.00 34 seg1 1990.00 2129.00 72 seg39 60.00 929.00 35 seg2 1990.00 2249.00 73 gnd 60.00 809.00 36 seg3 1990.00 2369.00 74 pwm2 265.25 652.30 37 seg4 1990.00 2489.00 75 pwm1 265.25 494.30 38 seg5 1990.00 2609.00
lcd c ontroller 19 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 11. application circuit : kc5724 a application circuit with lcd voltage regulation a 1 1 thursday, october 21, 1999 title size document number rev date: sheet of vcc vcc vcc xosc1 for rc or buzzer for crystal s3 s0 s1 s2 c3 c2 c1 c0 s32 s29 s15 s36 s13 s39 s27 s26 s12 s9 s30 s23 s33 s18 s17 s25 s24 s8 s31 s19 s20 s16 s10 s28 s35 s11 s37 s34 s21 s38 s14 s4 s5 s6 s7 s22 s1 c1 0.1u c9 0.1u c6 0.1u ls1 speaker c4 0.1u c2 0.1u r1 820k c3 0.1u c5 0.1u c7 22p y1 32768hz c8 22p u1 kc5724 com1 30 com3 32 gnd 21 xosc2 20 com2 31 seg0 33 seg1 34 seg2 35 seg3 36 seg4 37 seg5 38 seg6 39 seg7 40 seg8 41 seg9 42 seg10 43 seg11 44 seg12 45 seg13 46 seg14 47 seg15 48 seg16 49 seg17 50 seg18 51 seg19 52 seg20 53 seg21 54 seg22 55 seg23 56 seg24 57 seg25 58 seg26 59 seg27 60 seg28 61 seg29 62 seg30 63 seg31 64 seg32 65 seg33 66 seg34 67 seg35 68 seg36 69 seg37 70 seg38 71 res 14 vcap 18 vdd 1 port10 2 port11 3 port12 4 port13 5 port14 6 port15 7 port16 8 port17 9 c1b 22 gnd 73 pwm2 74 vlcd 28 com0 29 vc1 26 xosc1 19 vc2 27 port20 10 port21 11 c2b 24 c1a 23 port22 12 port23 13 pwm1 75 seg39 72 c2a 25 vdd 17 vdd 16 test 15 c[0-3] s[0-39]
lcd c ontroller 20 / 20 issue date : 22 september,1999 syntek semiconductor co., ltd. stk8 5 c 161 customer information sheet for STK85C161 9909 22 1. customer's name : ____________________ 2. project title : _________________________ 3. syntek part number : ___________________ (will be filled by syntek.) 4. package --------------------------------- ( ) chip ( ) qfp 5. options : lcd display clock ----------- ( ) rc ( ) 32768hz crystal p o r t 1 p 2 p o r t 3 7 6 5 4 3 2 1 0 3 2 1 0 7 6 5 4 3 2 1 0 pull-up 6. customer code : code form ----------------- ( ) eprom ( ) file _______________ checksum ----------------- 00000-07fff __________h 08000-0ffff __________h 10000-17fff __________h 00000-17fff __________h 7. operating conditions : all the operating conditions listed below are for syntek reference. syntek will not guaranty on these values. please refer to data book or contact syntek for the guaranty values. operating voltage : _____-_____ v operating current : _____ ma operating frequency : _____ hz sleep current : mode 1 : _____ m a (lcd off) mode 2 : _____ m a (lcd on), _____ m a (lcd off) customer : __________________ salesman : __________________date : __/__/__

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